Z80 Project Mark 2: More Dodgy Mods

So, I got some lights flashing over two weeks ago and then went quiet, "what's been going on?" you may well ask. Once I got the lights flashing, I wrote another demo that does a chase across the row of LEDs, this would show up if any of the tracks on the data bus were shorted as each led is lit individually and is driven by a single bus line. Once I'd done that I started work on the serial port code for the PIC's onboard serial port. The basic send and interrupt on receive code is working so it echoes each character it receives back at the moment.

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Z80 Project Mark 2: Photo Gallery

I've started a new album of pictures of the Z80 project so far. It's currently got pictures of the two boards, and labelled pictures with the chip models and functions. I'm going to add schematics soon.

Check it out here: albums/Z80ProjectMark2

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Z80 Project Mark 2: Flashing lights progress

I have made some progress on the Z80 project. Another mod, some software and learned some new lessons about PIC programming on Linux.

Another Mod

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Z80 Homebrew Progress

I've made some progress on the Mark 2 project and started the Mark 3!! First the Mark 2, I've built the system that I detailed in the articles on the Mark 2. There are a few odd bugs that I spotted as I tidied the circuit diagrams to add to the articles, these will need minor re-wiring of a bit of the glue logic. I kept the system on two bits of strip-board with the CPU and the PIC on the top layer with a bit of glue logic, the rest of the system (I/O decode, memory and peripherals are all on a lower layer, interfaced with 4 ten-way pin headers and receptacles. (Pics will follow soon).

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Nathan's Z80 Project Mark 2: CPU

The CPU in this system is a Z80 of course. There isn't much to this section in way of technical content, just a few explanations of what pins I've ignored and why really. I'm not using the RFSH pin as I'm using static RAM, I can't think of a reason to use this in a modern system, and can think of lots of reasons not to, DRAM is just too much like hard work if you ask me.

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Nathan's Z80 Project Mark 2: CPU Supervisor

A large amount of the usual faff found in Z80 systems has been avoided in my design by including a PIC next to the Z80. This PIC replaces the reset timing circuit, the clock generation circuit for the Z80 and the need for ROM and associated decode logic to select the ROM chip. In addition it provides mass storage (via an SD card interface) and a useful in-circuit emulator for debugging.

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Nathan's Z80 Project Mark 2: Debug Ports

One thing I've learned about Z80 systems is that they are quite hard to debug, at least compared to modern micro-controller based things that you can always get to flash an LED at you or dump data through a serial port. To help with the inevitable debugging that this system is going to require I built in a couple of debug features. One is that I connected more control lines that were absolutely necessary to the PIC.

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Nathan's Z80 Project Mark 2: Real Time Clock

The only additional feature I actually included in this project was the Real Time Clock (RTC) chip. I had got hold of this chip a couple of years back and was planning on using it in the Z80 Project (Mark 1). It was the last one Farnell had in stock and was then discontinued by them, I believed at the time that they were generally going out of production but I found this evening that they are still an "active" product according to Texas Instruments. There seems to be stock available from Digi-Key.

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Nathan's Z80 Project Mark 2: UART

I chose to keep the peripheral count low on this system, this was for several reasons;

  • Less to debug
  • Less to build (so faster, very important to stop me adding "features"!)
  • Provides a better system for experimenting (more IO address free)
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Nathan's Z80 Project Mark 2: Memory

The memory part of my Mark 2 system is extremely simple. There are two 32K SRAM chips (actually FRAM because I had them lying around, but there isn't any significant difference in this application). These are selected with the logical OR of the MREQ signal and A15 (or inverse of A15 for the upper chip). Because the boot code for the Z80 is held by the PIC and the PIC can control the whole address bus while it holds the Z80 in reset the boot code is written to normal RAM after power-on. This provides the advantage of less decode logic, and no ROM chip, as well as allowing the whole of the memory space to be used by whatever application is running as there are no "unwriteable" regions.

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